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 HPL Technologies Tackles Key Design-for-Manufacturing Issue of Electrical Performance With Cell Designer  

HPL Technologies Tackles Key Design-for-Manufacturing Issue of Electrical Performance With Cell Designer

SAN JOSE, Calif. - Oct. 4. -- HPL Technologies, Inc. (OTC Bulletin Board: HPLA.PK), a leading provider of yield optimization software and service solutions for semiconductor companies, has announced the immediate availability of Cell Designer, a next-generation DFM (Design for Manufacturing) software solution targeted at devices built in advanced process technologies (130nm and below).

Cell Designer is the first tool to address the core issue of DFM: predicting the electrical performance of a silicon circuit manufactured in a specific process. Design data, such as circuit netlist and layout, are combined with process information by physical simulation to predict electrical circuit performance. Calibrated process simulation accurately incorporates the effects of lithography, etch, and process variation to obtain physical estimates for circuit performance and yield. Cell Designer links for the first time design and manufacturing to predict circuit electrical performance across process variation in a fully integrated, easy-to-use package.

Traditional methods for yield improvement have relied on internal efforts or long and expensive consulting engagements. These approaches are not scalable and result in little internal yield learning at high cost. Today, semiconductor manufacturers are demanding a more scalable, software-oriented approach which truly brings manufacturing issues to the designer's desktop. Cell Designer is the first tool to effectively bridge the gap between the constraints of semiconductor manufacturing and the circuit performance requirements of design.

"Cell Designer represents a new approach to DFM," stated Cary Vandenberg, president and CEO of HPL Technologies. "By giving designers a way to quantify the impact of manufacturing on product performance and yield, semiconductor companies can generate a faster yield ramp with fewer design re-spins."

Cell Designer was developed through an agreement with SEQUOIA Design Systems, Inc., a leading provider of physical simulation software for the semiconductor manufacturing and design industry.

Cell Designer is available for immediate delivery from HPL. Pricing information is available directly from HPL. Visit http://www.hpl.com for more information on Cell Designer and other products offered by HPL.

About HPL Technologies

HPL is a leading provider of design for manufacturability (DFM) and yield optimization solutions that enable the semiconductor and flat panel display (FPD) industries to enhance the efficiency of design, fabrication and test. The Company's products include a robust, flexible software platform that allows customers to accelerate the process of identifying, measuring, and correcting sources of failure in production processes and designs. It combines these unique characterization capabilities with a variety of characterization circuits, and tailors solutions that gather and analyze key information to accelerate the yield learning process. In doing so, HPL enables its customers to achieve higher levels of quality and efficiency, thus driving revenue and profitability.

http://www.hpl.com

HPL Safe Harbor Statement Except for statements of historical fact, the statements in this press release are forward-looking statements. Such statements are subject to a number of risks and uncertainties that could cause actual results to differ materially from the statements made. These factors include, but are not limited to, general economic conditions, customer concentration, competition, risks associated with the acceptance of new products and product capabilities as well as meeting customers' expectations, risks associated with the development of new technology during a downturn in the semiconductor industry and the nature of our sales cycle, semiconductor industry cycles, litigation that has been filed, and the successful integration of acquisitions. These factors and other risks inherent in our business are described in our Annual Report on Form 10-K filed with the Securities and Exchange Commission on July 14, 2004. Actual results may vary materially. The Company undertakes no obligation to update the forward-looking statements contained herein to reflect events or circumstances after the date hereof or to reflect the occurrence of unanticipated events.

About SEQUOIA Design Systems

SEQUOIA Design Systems, Inc. is a leading provider of physical simulation software for the semiconductor manufacturing and design industry. The company specializes in engineering tools which rely on in-depth analysis of complex physical effects such as occur during the manufacturing and operation of modern semiconductor devices. Physical accuracy, performance, ease-of-use and a high-level of tool integration are among the major strengths of our offerings. SEQUOIA software is used worldwide by device engineers, ESD designers and circuit designers.
 



 
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